Smart readout technique designed for logarithmic CMOS image sensor including a motion detection scheme

In this paper we present a new readout technique designed for CMOS logarithmic image sensor. It provides also an implemented motion detection scheme useful for many applications especially those of surveillance. The main purpose of this work is to reduce power dissipation and time waste due to the readout of a huge amount of redundant data outgoing from the sensor through analog to digital converter (ADC). The circuit can perform averaging of the output signals of a block of (NxN) pixels, where N must be predefined as a function of the desired sensor resolution. A fast scan, of these mean values, followed by conversion and storage in digital memory arrays must be established. Afterwards, a comparison between the previous memorized array and the current one is performed. This comparison permits to control the generation of the addresses of the blocks that must be completely read in order to reconstruct an image with high resolution. The circuit is designed in the CMOS 0.35 μm AMS technology. The electrical simulation is given along with the emulation results done with MATLAB. As a result, we obtain a logarithmic image sensor with a pixel area of 14.3 × 14.3 μm
²
and a dataflow reduction more than 55%.