Simple Fabrication of a Three-Dimensional CMOS Inverter Using p-Type Poly-Si and n-Type Amorphous Ga–In–Zn–O Thin-Film Transistors

We have successfully fabricated a novel 3-D vertically stacked complementary metal–oxide–semiconductor hybrid inverter using a lower p-type poly-Si thin-film transistor (TFT) and an upper n-type amorphous Ga–In–Zn–O (a-GIZO) TFT. The device was fabricated step by step, starting from the fabrication of the lower poly-Si TFT via a high-temperature process to the fabrication of the upper a-GIZO TFT via a low-temperature process; this was done to prevent damage to the TFTs and to optimize their characteristics. The entire process was further simplified by the coplane gate structure that allows successive formation of the a-GIZO TFT on the poly-Si TFT. The transfer characteristics show clear inverter actions, indicating high performances of the TFTs.