Fuzzy interpretable dynamically developing neural networks with FPGA based implementation

Methods of hardware implementation for fast, transparent and efficient neural classifiers based on dynamically developing network structures are presented. The neural networks and the learning algorithms are modified for easy hardware implementation. The proposed methods are tested with several application examples. The hardware implementability is verified by simulating the parallel parts in VHDL and generating architectures for field programmable gate arrays (FPGA) with a commercially available high level synthesis tool.