Performance of digital neuro-computers

This paper deals with performance measurement and evaluation of digital neuro-computers. We discuss the constraints introduced by hardware implementations. A revisited definition of computer speed-up is then proposed, taking into account both the traditional notion of parallelization speed-up and the algorithmic precision of the machines. Finally we show, on the example of the Kohonen feature map algorithm, how a fair benchmarking procedure can be established to evaluate digital neuro-computers more significantly than using the traditional Mcups metric.