Performance evaluation of CMOS ring-oscillators with source/drain regions fabricated by asymmetric/symmetric ion-implantation

0.5 /spl mu/m CMOS ring-oscillators with LDD-type surface-channel n-MOSFETs and EPS-type buried-channel p-MOSFETs with asymmetric/symmetric source/drain fabricated by four kinds of ion-implantation methods were measured for evaluating the circuit performance. The ion-implantation methods were correlated to supply-current/oscillation-frequency/delay-power product and substrate current of the ring-oscillator. The most preferable implantation method was the symmetric 7/spl deg//spl times/4-implantation in terms of circuit performance, asymmetry/mismatch and punchthrough immunity of CMOSFET.