A dual gate flash EEPROM cell with two-bit storage capacity

In this paper, a dual-gate Flash EEPROM cell is proposed which allows the storage of two bits with only a slight increase in the cell size with respect to the single-bit case. Extensive simulations show that the basic functions of the Flash cell, namely reading, programming and erasing are possible with a suitable setting of the applied voltages. A simplified model based on the equivalent circuit of the cell allows for a qualitative interpretation of the obtained results, providing at the same time useful hints for the optimization of the cell parameters. Moreover, a schematic of the cell array is presented and some issues related to the array organization are briefly discussed.