VLSI implementation of a 32-bit Kozen formulation Ladner/Fischer parallel prefix adder

As modern processors' word lengths increase and clock cycle times get shorter, it becomes more and more important to have basic arithmetic functions which can be used without becoming a bottleneck. The parallel prefix adder has depth O(log n) and area O(n). Since the parallel prefix adder has a regular structure with very limited fan-out, it is ideally suited for use in VLSI applications.