Simulation Study of Stack Gate Insulated Shallow Extension Silicon On Nothing ISE-SON MOSFET for RFICs Design

In this paper, we present the simulation study of RF linearity of gate stacked Insulated Shallow Extension Silicon On Nothing (ISE-SON) MOSFET and compared it with the Insulated Shallow Extension (ISE) and silicon On Nothing (SON) MOSFET using ATLAS 3D device simulator. ISE architecture along with the SON MOSFET proves to be better candidate for suppression of Short Channel Effects (SCEs).