An Integrated Stimulator With DC-Isolation and Fine Current Control for Implanted Nerve Tripoles

This paper presents the design of an integrated nerve stimulator for use with tripole electrodes. The main features of the design are: it is a constant current stimulator with passive electrode discharge; it is fail-safe without requiring discrete capacitors in series with the electrodes; and the anode current ratio can be adjusted to minimize the electric field outside the electrode mount (cuff, book, etc) so as to prevent crosstalk to adjacent nerves. The safety feature uses high-frequency current switching (HFCS) employing small on-chip blocking capacitors. The charge loss due to the parasitic capacitances in the HFCS output stage is reduced by bootstrapping. In addition, a method is described to implement the current generator featuring small silicon area and good linearity. A two-channel stimulator was implemented in a 0.6-μm silicon-on-insulator CMOS process. The current generator occupies a silicon area of 0.3 mm
²
. It consists of a 4-bit coarse amplitude section with 100 μA steps and a 4-bit differential adjustment section with 6.25 μA steps. The output stage achieves a charge efficiency of about 90% for a 1 kΩ load and occupies a silicon area of 0.5 mm
²
. The performance of the stimulator, including crosstalk nulling measurements, was verified using tripoles in saline. The HFCS method should be considered for stimulators which must be small and sited close to the target nervous tissue.