Parameters design of 1.25GHz low jitter charge pump PLL

Third-order charge-pump phase-locked circuit is simulated, system parameters ware designed by the perspective of jitter of the system, and the phase noise, settling time, and other aspects of system parameters; The result is that the jitter of PLL is 1.5 ps with phase noise 108 dBc/Hz@1MHz, and the lock time is 4 us. This idea of the design can be applied to design variety of charge-pump PLL.