A CMOS Colpitts VCO Using Negative-Conductance Boosted Technology

A circuit topology suitable for a low-voltage low-power Colpitts voltage-controlled oscillator (VCO) is presented in this paper. By employing inductors for a negative-conductance boosted structure, the dc power consumption of the Colpitts VCO can be effectively reduced. Based on the proposed architecture, the VCO fabricated in 0.18-μm CMOS exhibits a measured 1.3% tuning range around 30 GHz. Operating at a supply voltage of 1.0 V, the VCO core consumes 2.3-mW dc power, and the measured phase noise is -104.1 dBc/Hz at 1-MHz offset. Compared to the recently published 20 to 30-GHz 0.18-μm CMOS VCOs, this work achieves a reduced supply voltage, minimized dc power consumption, small chip size, superior figure-of-merit (FOM), and better figure-of-merit including the tuning range (FOM
_T
). Formulas for considering the nonlinear characteristics of varactors and active devices are also presented, and the accuracy of predicting the VCO tuning curve is validated by measurement.