Off-State Degradation of High-Voltage-Tolerant nLDMOS-SCR ESD Devices

The OFF-state degradation of n-channel laterally diffused metal-oxide-semiconductor (MOS) silicon-controlled-rectifier electrostatic-discharge (ESD) devices for high-voltage applications in standard low-voltage complementary MOS technology is studied. Based on experimental data and technology computer-aided design simulations, impact ionization induced by conduction-band electrons tunneling from an n
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poly-Si gate to an n-well is identified to be the driving force of device degradation. Device optimization is proposed, which improves both OFF-state and ESD reliability.