An Investigation of Gate Drive Circuits and Losses in Power Devices of Multilevel Converters for Circuit Integration to Realize High Output Power

This paper describes an investigation of gate drive circuits of multilevel converters for circuit integration to realize high output power density (OPD). As key issues to implement the integration, methods for the isolation of the gate signal and the isolated power supplies suitable for the integrated diode-clamped multilevel converters are discussed. The usefulness of these methods has been confirmed by simulation and experimental results. Effectiveness of the multilevel converters on the reduction of the losses in the power devices and the total volume is evaluated for both silicon (Si) and gallium nitride (GaN) lateral devices.