Search-based wordlength optimization for VLSI/DSP synthesis

VLSI implementations of DSP computations must be efficient, and also guarantee numerical correctness. This can be achieved through wordlength optimization which trades precision for VLSI measures such as area, speed and power. We present a general search-based methodology for wordlength optimization in VLSI/DSP synthesis. Our methodology is based on statistical precision analysis and incorporation of VLSI measures into an objective function through wordlength parameterization. We use an abstract VLSI model simplified by partitioning the system into basic components and express VLSI measures as functions of wordlengths. This allows us to formulate an optimization problem for VLSI synthesis under finite precision constraints, or to evaluate VLSI costs/performance after the optimization. We show how a general search-based wordlength optimization can produce optimal or near-optimal solutions for different objective-constraint formulations of various applications.