The prototype development phase of the CubeSat On-board processing Validation Experiment

The Xilinx Virtex-5QV FPGA is a new radiation-hardened-by-design (RHBD) part that is targeted as the spaceborne processor for the Decadal Survey Aerosol-Cloud-Ecosystem (ACE) mission's Multiangle SpectroPolarimetric Imager (MSPI) instrument
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. A key technology development needed for MSPI is on-board processing (OBP) to calculate polarimetry data as imaged by each of the 9 cameras forming the instrument. With funding from NASA's ESTO
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AIST
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Program, JPL is demonstrating how signal data at 95 Mbytes/sec over 16 channels for each of the 9 multi-angle cameras can be reduced to 0.45 Mbytes/sec. This is done via a least-squares fitting algorithm implemented on the Virtex-5 FPGA operating in real-time on the raw video data stream. Last year at this conference the results of a feasibility study between JPL and U. Michigan were presented in a paper titled, “A CubeSat Design to Validate the Virtex-5 FPGA for Spaceborne Image Processing.” Out of that study, a new task has been funded by NASA's ESTO ATI
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Program to integrate the MSPI OBP algorithm on the Virtex-5 FPGA as a payload to the University of Michigan's M-Cubed CubeSat, manifest a launch opportunity, and gain on-orbit validation of this OBP platform to thereby advance the Technology Readiness Level (TRL) for MSPI and the ACE mission. This new task is called COVE (CubeSat On-board processing Validation Experiment) and is the topic of this paper. The COVE task is an 18-month effort to develop the flightready U. Michigan M-Cubed CubeSat with the integrated JPL OBP payload. The targeted completion date is September 2011. M-Cubed's primary payload is an OmniVision 2 MegaPixel CMOS camera that will take quality color images of the Earth from Low Earth Orbit (LEO) and save them to a Taskit Stamp9G20 microprocessor. This paper presents the prototype design and integration of the M-Cubed microprocessor system with the JPL payload that provides the image processing platform for on-orbit OBP validation. The high-level requirements and interface specifications for the delivery of the JPL FPGA-based payload hardware to the University of Michigan will be described. Finally, a recent decision regarding a launch opportunity for M-Cubed will be reported.