Analog front-end of an ECBM transceiver for ISDN

The analog front-end of an ECBM transceiver operating from a single 5-V supply is described. The chip performs pulse shaping and line driving in the transmit section with hybrid function, equalization, A/D (analog-to-digital), D/A automatic gain control, threshold detection for PLL (phase-locked loops) and weak-up in the receive section. The chip dissipates about 160 mW in normal operation mode and 7 mW in power-down mode. The die area is 50000 mil
²
in a 2-μm, double-poly, single-metal CMOS technology