Modeling Undeposited CNTs for CNTFET Operation

The carbon nanotube field-effect transistor (CNTFET) is a promising device to supersede the MOSFET at the end of the technology roadmap of the CMOS. When designing and manufacturing a CNTFET, additional features such as pitch, number, and position of the CNTs must be considered to assess its performance. One of the defect types that can occur when fabricating a CNTFET is the absence of some CNTs following the deposition/growth step. As a result of this type of defect, a CNTFET will show a change in operational characteristics because the drain current, gate capacitance, and delay will be affected due to the lower number of CNTs with uneven spacing between them present in the channel of the transistor. This paper presents a new model by which the drain current, the gate capacitance, and the delay can be found when not all CNTs are deposited on the substrate. This results in an uneven CNT spacing in the channel; new equations are derived and shown to be applicable to both defective and defect-free CNTFETs. The proposed model has been implemented in MATLAB and has been extensively simulated to show that defects due to undeposited CNTs have a significant impact on the operation of a CNTFET. Delay as degradation in performance is shown to be related to both the number and position of the defects; an extensive delay analysis on both deterministic and probabilistic basis is presented.