A 2.45GHz power harvesting circuit in 90nm CMOS

In this work, an overview of the state-of-the-art of the design techniques of power harvesting (rectifying) circuits is presented. The evolution of each circuit, the advantages and design constraints, are investigated and compared. Furthermore, a novel 2.45 GHz power-harvesting circuit is implemented in 90 nm CMOS. Using voltage and power conversion efficiency as a FOM, the optimum rectifier topology is determined. When input power is -19.73 dBm, the proposed rectifier allows improving the Power and the Voltage Conversion Efficiency, achieving a PCE of 14.68% (for R
_L
=1MΩ) and a VCE of 29.21%.