A linearity improvement technique for a class-AB CMOS Power Amplifier with a direct feedback path

A new linearity improvement technique is introduced for a class-AB CMOS Power Amplifier (PA). The proposed PA has two stages and each stage has a cascode configuration. A direct feedback path from the input of the power stage to the input of the driver stage via an Accumulation-mode MOS (AMOS) varactor is adopted to improve the linearity. This additional path provides a negative feedback loop for the second-order harmonic, and the AMOS varactor controls the loop gain and the amount of the phase shift of the feedback signals. The proposed PA has been implemented in a standard 0.18-μm CMOS technology. The measured results show a gain of 21.4 dB, a maximum output power of 23.5 dBm with 43.1 % of peak Power-Added-Efficiency (PAE), and a linear output power of 21.4 dBm with 40 % PAE using a 1.85 GHz single tone. The two-tone test demonstrates 10 dBc improvement in the third-order Intermodulation Distortion (IMD3) compared to a conventional PA.