Design of a highly linear 900MHz single ended LNA in 0.35µm CMOS technology

This work presents the design of a Low Noise Amplifier in 0.35 µm CMOS technology from Taiwan Semiconductors. A single ended cascade configuration with inductive degeneration followed by a common source configuration is used. The circuit is designed in Cadence and employs feedback technique along with the use of a PMOS as a feed forward distortion canceller to further improve linearity. At 900 MHz, the low noise amplifier has a gain of 10.3dB, noise figure of 3.2dB, input referred 1dB-CP of −2.75dBm, output referred 1dB-CP of 6.85dBm, IIP3 of +11.74dBm and OIP3 of +21.76dBm consuming 26mA from 1.5V supply. This design has the best input referred 1dB-CP reported till date in 0.35 µm technology for the desired frequency of operation.