Mapping loops onto Coarse-Grained Reconfigurable Architectures using Particle Swarm Optimization

Coarse-Grained Reconfigurable Architectures (CGRAs) have gained currency in recent years due to their abundant parallelism and flexibility. To utilize the abundant parallelism found in CGRAs, we propose a fast and efficient Modulo-Constrained Hybrid Particle Swarm Optimization (MCHPSO) scheduling algorithm to exploit loop level parallelism in applications. PSO has been proved to be successful in many applications in continuous optimization problems. In this paper, we show that PSO is capable of software pipelining loops by overlapping placement, scheduling and routing of successive loop iterations and executing them in parallel. Our proposed algorithm has been experimentally validated on various DSP benchmarks under two different architecture configurations. These experiments indicate that the proposed MCHPSO algorithm can find schedules with small initiation intervals within a reasonable amount of time. PSO is thus a promising alternative for obtaining near optimal solutions to this NP-hard scheduling problem.