Optimum collector width of VLSI bipolar transistors for maximum f/sub max/ at high current densities

A simple analytical model for optimum collector epi-layer thickness W/sub epi/ to maximize f/sub max/ of VLSI bipolar transistors having reach-through collector is reported. Numerical and analytical results for W/sub epi/ are compared to verify the validity of our model for the optimum collector epi-layer thickness at high current densities.