On the punchthrough phenomenon in submicron MOS transistors

As the channel length of MOS transistors reduces to the submicron dimension, the punchthrough becomes more of a surface-initiated and gate-controlled phenomenon. A surface diffusion current (I/sub sdif/) originates from the injection of minority carriers from the source junction due to the combined effect of drain-induced-barrier-lowering (DIBL) and surface-band-bending (/spl Delta//spl phi//sub so/). The DIBL effect increases rapidly with decreasing channel length. In addition, the extracted /spl Delta//spl phi//sub so/ from the punchthrough current indicates that surface space charges at the source edge shift from the accumulation/depletion mode for long submicron devices (/spl ap/0.62 /spl mu/m) to the strong-inversion mode for deep submicron devices (/spl ap/0.12 /spl mu/m). In general, I/sub sdif/ dominates over the low drain bias range and eventually converts to the bulk space-charge-limited current (I/sub scl/) as the drain bias increases and the source/drain depletion regions connect. The drain bias for this conversion to occur strongly depends on the channel dimension. Only intermediate submicron devices (/spl ap/0.37 /spl mu/m) in this study clearly show both the surface and bulk (space-charge-limited) punchthrough components. For long submicron devices, I/sub sdif/ essentially dominates, while for deep submicron devices, it converts rapidly to I/sub scl/ over the drain bias range investigated. A semi-empirical closed form equation is proposed to describe both I/sub sdif/ and I/sub scl/ and their merging over the entire range of drain bias.