Channel and switchbox routing with minimized crosstalk. A parallel genetic algorithm approach

Reduction of crosstalk between interconnections becomes an important consideration in today's VLSI design. This paper presents a novel approach to solve the VLSI channel and switchbox routing problems with the objective of satisfying crosstalk constraints for the nets. The approach is based on a parallel genetic algorithm which runs on a distributed network of workstations. All our routing results are qualitatively better or as good as the best published results. In addition, our algorithm is able to significantly reduce the occurrence of crosstalk.