Directions for silicon technology as we approach the end of CMOS scaling

Summary form only given: CMOS at the 45 nm node has been in production for a couple of years now, and 32 nm CMOS is making its way into leading-edge products. If everything goes according to plan, CMOS at the 11 nm node should be in production in less than ten years from now. However, every technology has its limits and CMOS is no exception. While there will be billions of CMOS devices on a chip, and “mobility engineering” will continue to enable ever faster CMOS devices, band-to-band tunneling will push up the standby currents and cap the speed of any transistor requiring low standby power dissipation. At the same time, the total power dissipation, at the chip level as well as at the system level, is severely limiting the realizable speed from these CMOS devices. More innovative approaches will be required to meet the expected improvement in system performance. Nonetheless, the glass for continuing the rapid progress in silicon technology appears half full because system designers need a lot more than faster or lower-power transistors. While the specifics depend on the system, the needs apply to systems in general, including wireless personal systems and high-end servers. These needs include increasingly larger memory capacity and increasingly larger memory bandwidth, huge amounts of data storage, especially storage that can be accessed at much larger bandwidth than traditional magnetic disk storage, and volumetrically dense system-level packaging. And, of course, the power dissipation must be consistent with the thermal and power dissipation requirements of the systems. In this talk, the fundamentals that could limit the scaling of CMOS beyond the 15 nm node will be discussed, and the silicon opportunities for meeting the system needs of "besides faster or lower-power CMOS transistors" will be described. The emphases will be on opportunities in memory technologies and on exploiting SOI CMOS as a SoC platform. The full potential of the opportunities can be realized only by technologist and system design engineers working closely together in exploratory research and in R&D.