A 14-bit 100 MS/s self-calibrated DAC with a randomized calibration-period

A 14-bit 100MS/s self-calibrated Digital-to-Analog converter (DAC) is presented. Analog background self-calibration technique with a randomized calibration-period is adopted to improve the dynamic performance. The DAC is fabricated in SMIC 0.13-μm CMOS process and occupies a 1.29mm
²
die area. The measured DNL/INL is better than 3.1LSB/4.3LSB. The SFDR is 72.8dB at 1MHz signal and 100MHz sampling frequency. And the current consumption is 50mA under 1.2/3.3V dual power supplies for digital and analog part, respectively.