Circuit for multiplication of two sigma-delta modulated pulse streams

To multiply two digital signals, conventional n-bit digital multipliers are used. In the case of multiplication of two sigma-delta modulated (ΣΔM) sequences, decimation of these sequences must first be performed. A decimation circuit often requires a large silicon area and large power consumption. However, there are applications in control systems and instrumentations where simpler circuits for direct processing of ΣΔM streams are needed. This paper presents a new circuit for direct multiplication of two sigma-delta modulated sequences. Two analog input signals to be multiplied, x(t) and y(t), are converted first, using ΣΔM, and then processed directly using off-shelf digital circuitry such as D flip-flops, delta adder and XOR gates. In addition to the proposed circuit diagram, results of a simulation will be presented.