Noise distribution of multi-core CPU packages

This paper deals with noise distribution over nonuniform two-dimensional planes of multi-core CPU packages. The numerical algorithm is based on circuit finite difference time domain, which employs voltage-controlled current sources in the current/voltage updating scheme. It is applied to plane pairs with non-uniform geometry (which can include metal voids), as well as arbitrary location of sources and decoupling capacitors. The model is extended to a full-3D package stack-up, and the noise distribution on the power planes is analyzed with uniform and point-source excitation.