Programmable MBIST Merging FSM and Microcode Techniques Using Macro Commands

FSM-based and microcode-based controllers are two widely known techniques used for memory built-in self test (MBIST). FSM-based controller is commonly the hardwired BIST whilst microcode-based controller is a programmable memory BIST (P-MBIST) controller. The P-MBIST is popular because of their flexibility of programming new test algorithms. Recently, the FSM-based memory BIST has evolved from hardwired BIST to P-MBIST by applying macro-commands on-line. In this macro-command P-MBIST, the test algorithms and the MARCH elements are represented by macro codes. However, the read/write operations, the applied test data and the addressing orders in an element are still controlled by the FSM. In this paper, the read/write operations and the applied test data are micro-coded before being controlled by the FSM in order to minimize the area overhead for the P-MBIST. To reach the objective, the previous P-MBISTs using macro-commands are studied and reconstructed. The components of the proposed P-MBIST controller are designed and explained. These controllers are written using Verilog HDL and implemented in ALTERA Cyclone II FPGA. Analysis and comparison of architecture between these three P-MBIST controllers are performed. The simulation and synthesis results of all three architectures are presented. The performance of each controller is compared in term of area overhead and speed. The synthesis result proves the area of the proposed controller is improved by 24 to 31 percent compared to the previous P-MBIST controllers.