Design of a digital speech processor

This paper describes the design of a flexible hardware structure called Digital Speech Processor (DSP), which is the core module of implementing several code-excited linear prediction (CELP) algorithms such as IS-96, IS-54, RCR-27, G.728, etc. In China, there are a lot of communication systems being used, therefore, it is very difficult to determine a common speech coding algorithm, instead, many kinds of speech coding algorithms are coexisting. For this reason, finding an effective way to implement these speech coding algorithms can reduce the product development time and quickly go to market. The DSP described in this paper is more flexible for implementing many of the speech coding algorithms mentioned above. The structure of DSP is presented in this paper; also included are VHDL descriptions of some modules.