Exploiting control management to accelerate Radix-4 FFT on a reconfigurable platform

In this paper, we present the mapping of 64 and 1024-point FFT algorithms on a Radix-4 FFT accelerator generated using a hardware template called CREMA. The accelerator designed is targeted for FPGA. The execution time for 64 and 1024-point FFT meets 802.11a/g and 3GPP-LTE timing constraints. A speed-up from 3X to 68X was achieved when both of the implementations were compared with similar and general purpose platforms.