5-V Buck Converter Using 3.3-V Standard CMOS Process With Adaptive Power Transistor Driver Increasing Efficiency and Maximum Load Capacity

A high-voltage-tolerant buck converter with a novel adaptive power transistor driver is proposed in this paper. In order to minimize the
R
_ON
of the cascode power transistor, the proposed scheme uses optimized and separated driving voltages for bias of the pMOS and nMOS power transistors. This increases not only the conversion efficiency, but also the maximum allowable load current for the transistor driver with small layout size, when compared to the buck converter with the earlier scheme. The measurements show that when the supply voltage is 2.5 V and the load current is 150 mA, the efficiency of the buck converter with the earlier scheme is 82%, whereas the efficiency of the buck converter with the proposed scheme is 92%, showing a maximum improvement of 10%. The designed buck converter uses the 0.35- μm-thick gate oxide CMOS process, and at 2.5-5 V of voltage, can supply up to 380 mA of load current. The total chip size is 2.7 mm
²
.