PUD-LRU: An Erase-Efficient Write Buffer Management Algorithm for Flash Memory SSD

Flash memory SSDs pose a well-known challenge, that is, the erase-before-write problem. Researchers try to solve this inherent problem from two different angles by either designing sophisticated Flash Translation Layer (FTL) schemes to postpone and minimize erasures or designing flash-aware buffer management algorithms to absorb unnecessary erasures. Our experimental results show that buffer management inside SSD is necessary and indispensable. Further, based on our observation that TPC and some server workloads have strong temporal locality, this paper proposes a new flash-aware write-buffer management algorithm, called PUD-aware LRU algorithm (PUD-LRU), based on the Predicted average Update Distance (PUD) as the key block replacement criterion on top of log-block FTL schemes. The main idea of PUD-LRU is to differentiate blocks and judiciously destage blocks based on their frequency and recency so as to avoid the unnecessary erasures due to repetitive updates. To take advantage of the characteristics of log-block FTL and increase the erase efficiency, PUD-LRU maximizes the number of valid pages in the destaged block in each erase operation. Our trace-driven experimental results show that the PUD-LRU algorithm can reduce the number of erasures of the state-of-the-art buffer management algorithm BPLRU by up to 42%, and average response time by up to 56%, while reducing the two measures of the state-of-the-art page-mapping FTL scheme DFTL by up to 73% and 75%, respectively.