New software tools accelerate the fab layout process at National Semiconductor

Summary form only given, as follows. Building a new semiconductor fabrication facility costs over $1 billion, and the cost of rearranging existing facilities on average exceeds $50000 per tool. These costs, plus shrinking lead times from layout concept to implementation in order to speed new product to market, make it critical that the layout designer quickly and effectively evaluate issues affecting the fab layout in order to get the layout right before construction begins. In response to this need, a set of relatively new software tools (collectively called Facility Layout/Relayout Tool, or FLRT) were developed to enable the layout designer to create the best possible layout in the shortest possible time while simultaneously creating effective documentation of the layout process. In addition to accomplishing this goal, the FLRT software has allowed the layout designer to evaluate other decisions, such as the cost/benefits of implementing an automated material handling system (AMHS) versus conventional material movements, and the relative aisle widths required based on the intensity of material flow. The FLRT development was partially sponsored by SEMATECH. This paper discusses how National Semiconductor used FLRT to design the layout for a new 200 mm wafer fabrication facility in South Portland, Maine.