Low-cost process for fabricating polysilicon transistors

A process for the fabrication of p-channel polysilicon MOS transistors is described. The process is compatible with the use of low-temperature glass substrates and replaces the use of ion implantation for the source/drain doping with in situ doped polysilicon. MOS transistors made with this process exhibit an on/off current ratio of 2.5*10/sup 5/, a mobility of 16 cm/sup 2//V-s, and a subthreshold slope of 1.3 V/decade.<
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