A low-power CMOS implementation of programmable CNN's with embedded photosensors

In this brief, an analog CMOS implementation of a Cellular Neural Network (CNN) is presented, which is based on a combination of MOS transistors operating in different modes: weak and strong-inversion and MOS transistors operated in the lateral bipolar mode. This combination has enabled a VLSI implementation of a simplified version of the original CNN model with the main characteristics of low-power consumption, programmability, and embedded photosensors to process images directly projected on the chip. An 8/spl times/8-cell CNN chip prototype is reported with experimental results for different image processing tasks. A density of 10.7 cells/mm/sup 2/ in a 1.2-/spl mu/m CMOS technology and a power consumption of tens of microwatts per cell are obtained.