Energy-efficient 128∼2048/1536-point FFT processor with resource block mapping for 3GPP-LTE system

In this paper, we propose an energy-efficient 128∼2048/1536-point partial FFT processor for the resource block mapping in the 3GPP-LTE OFDMA system. First, we present a modified partial cached-FFT algorithm with radix-2/2
²
/3 operations for different resource block allocation in the OFDMA system. Then, based on the proposed algorithm, we build up the architecture of radix-2/2
²
/3 cached-FFT processor. This processor can partially compute the selected resource blocks assigned by the base-station with the virtual resource block (VRB) to physical resource block (PRB) mapping in the 3GPP-LTE system. The proposed FFT processor was designed and implemented using TSMC 0.18µm 1P6M CMOS technology. Measurement results of the test chip show that the FFT processor runs at 35MHz with 11.29mW power consumption and it consumes 0.5 to 1.29nJ per FFT point.