A design method for associative memories using discrete-time cellular neural networks with a reduced number of cell interconnections

In this paper a design method for associative memories using discrete-time cellular neural networks (DTCNNs) is presented. The developed approach enables the number of cell interconnections to be reduced by exploiting the features of multilevel output functions and utilizing proper neighbourhoods which avoid line-crossings among interconnections in the designed networks. As a consequence, the suggested technique greatly simplifies the VLSI implementation of the proposed DTCNN architecture.