Cu to Cu interconnect using 3D-TSV and wafer to wafer thermocompression bonding

In this paper we report on the use of Silicon wafer to wafer bonding technology using Trough Silicon Vias (TSV) and Cu to Cu hybrid interconnects. We demonstrate that multiple wiring levels of two separate wafers, can be interconnected on a full wafer scale by means of wafer bonding using classical metallization schemes found in IC's such as Al and Cu interconnect technologies. The wafer to wafer stacking is accomplished by back to face aligned wafer bonding using a combination of polymer bonding and copper to copper thermo-compression bonding. The Cu TSV-last process is inserted after the integration of a classical Al interconnect scheme. The top wafer is thinned down to 25μm and bonded to the landing wafer by hybrid Cu-Cu bonding in a high force bonding tool. Measurements of TSV interconnect chain structures covering the full wafer surface are provided as a demonstration of the relevance of such a process route.