Design of 60-GHz CPW-fed CMOS on-chip integrated antenna-filter

This paper presents a 60-GHz millimeter-wave on-chip integrated Yagi-antenna-filter fabricated with a 0.18-μm CMOS process. An FEM-based 3-D full-wave EM solver, HFSS, is used for design simulation. The measured input VSWR of the fabricated on-chip Yagi-antenna-filter is less than 2 from 55 to 65 GHz. The measured maximum power gain is about -14 dBi. The front-to-back ratio of the radiation pattern is about 14 dB.