A Pipelined Digital Filter Chip with a Throughput Rate of 100 Mbit/s

A digital lowpass filter for an image coding and processing system is described. To achieve the high throughput rate (up to 100 Mbit/s) a pipeline-organization had to be used. The mapping of the filter function to a regular pipeline configuration in bit-slice technique is explained. The circuit was implemented in a standard 2 μm NMOS-technique. The 3.2×1.7 mm
²
chip needs 3500 transistors and consumes 250 mW.