Vertical multi-bit resonant tunneling diode memory cell

We propose and demonstrate a new resonant-tunneling diode (RTD) based memory cell in which bits are stacked vertically while their addressing requires only two physical contacts to the vertically integrated RTDs (VIRTDs). Toward meeting the ultra low static power requirements we have developed record low current density (down to 0.16 A/cm2) InP based RTDs with 300 K peak-to-valley current ratios (PVCRs) ranging from 2.9 to 18.