Corrections to “Analytical Expressions for High-Frequency VLSI Interconnect Impedance Extraction in the Presence of a Multilayer Conductive Substrate” [Jul 09 1047-1060]

In the above titled paper (ibid., vol. 28, no. 7, pp. 1047-1060, Jul. 09), there is an error in equation (17) and equation (15) should be modified. The corrections are presented here.