A 12-bit cyclic ADC with random feedback capacitor interchanging technique

This work implements a 12-bit cyclic ADC with random feedback-capacitor interchanging (RFCI) technique to reduce the harmonic distortion caused by capacitor mismatch. Without sacrificing SNDR, the RFCI technique can improves upon the SFDR of conventional ADCs. The ADC is realized with a reconfigurable architecture to demonstrate the effect of the RFCI technique. The performance comparison between the RFCI and conventional techniques is obtained using the same cyclic ADC. The ADC uses simple clock-timing control circuits to switch arrangements of capacitor connection. This capacitor swapping architecture does not need additional complicated digital calibration circuits. Hence, it is suitable for low-power and low-cost applications. This single chip occupies 0.63-mm
²
active area in a 0.35-¿m, double-poly, four-metal CMOS process. Measurements show that the SFDR and SNDR obtained using the RFCI technique are 7 dB and 0.5 dB higher than those obtained using the conventional technique, respectively, which indicates the advantages of the RFCI technique.