Blocking in a system on a chip

With more and larger functions being implemented on a single piece of silicon, true systems on a chip are being created. At the physical level, this integration derives from progress in process technology. But from the circuit designers' viewpoint, tools and methods are less help than they might be. In effect, to construct a system on a chip means more than the integration of millions of transistors. A set of complicated and rapidly evolving technologies and standards for telecommunications, multimedia, and PCs must be mastered, too. Also, the software content of most electronic systems has been growing for several years and now often accounts for a major part of the final product and hence of the design effort. Since a system on a chip is a system, a design methodology for generating such complex ICs will frequently have to address the software as well as hardware needs. Further more, as the size and complexity of chips has grown, so too has the task of verification. Verifying the design of a chip containing a million gates of logic presents a formidable challenge of its own. The complexity of large designs calls for a shift in the design paradigm to one based on reusable, high-level building blocks. Currently, most functional blocks are created by hand and are seldom used again. Reusable blocks, though, are not enough. To deliver on the promise of more productivity and less time to market, designers need reinforcements-a methodology and tools with which to integrate the blocks efficiently, plus standards that support the creation of reusable blocks, their exchange, and their integration.