Design of a memory-efficient IIR filter bank with application to subband coding of image and video signals

An efficient IIR PR tree-structured filter bank for HDTV and video signal coding is investigated. Both the arithmetic complexity and the internal chip memory required for the decoder are considerably lower than those of existing FIR synthesis filter banks, while it provides comparable coding performance. Using modern CMOS technology, it is feasible to build the entire decoder on a single chip, thereby facilitating applications such as real-time decoding of compressed HDTV and video signals.