On the Choice of High-$\kappa$ Dielectrics for Metal Nanocrystal Memory to Improve Data Retention

An investigation on the optimized choice of high-κ gate dielectrics and metal nanocrystals (NCs) for improving retention capability of a flash memory is presented. The influence of charge neutrality level (CNL) of gate dielectrics on retention time is quantified. Results show that retention efficacy of metal NCs with high work function (WF) is adversely affected when embedded in certain oxides with high CNLs. This unravels that both the CNL and WF must be tuned together to maximize the retention period.