Verifying firewall circuits by wave-pipelined operations

H-HIPS (Hardware- and Host-Based Intrusion Prevention System) is an IPS that can be used on UMPC (Ultra-Mobile PC) or PDA (Personal Digital Assistant). Because it has been achieved by using a FPGA (Field Programmable Gate Array), the use of the hardware resource for intrusion detections is limited. Additionally, the operation of low power consumption is very important. In this paper, a firewall unit by wave-pipelined operations is described. The firewall unit is used for port filtering and power control of IDL (Intrusion Detection Logic) on H-HIPS. The wave-pipelined operations and the performance of the firewall unit are evaluated by using a logic analyzer. The domination of power consumption by wave-pipelining is described.