Optimization of Plasma Processing for Silicon-Gate FET Manufacturing Applications

The development and implementation of plasma processing techniques for silicon-gate FET manufacturing applications is described. Process requirements are discussed for the stripping of photoresist and the isotropic etching of thin films. A systematic approach for the optimization of these processes, involving the use of statistically designed multiparametric experimentation (MPE), is presented. This approach, in combination with the use of response-surface analysis techniques, is illustrated by examples of its application to typical processing problems. In addition, the multiparametric optimization of anisotropic etching is presented for potential plasma processing enhancements.