Efficient search area loading technique for block-based motion estimation and its FPGA implementation using flexible triangle search algorithm

An efficient technique for loading search area in block-based motion estimation is proposed. The main advantage of the proposed technique is to reduce number of search area loading cycles by taking advantage of the vertical and horizontal overlap between adjacent search areas and thus improve the overall performance of the motion search and frame encoding. The proposed technique was implemented in FPGA as part of the flexible triangle search (FTS) motion estimation algorithm. However, the proposed technique can be used in similar search algorithm. The FTS is a fast block-matching algorithm for motion estimation proposed in previous work. The FTS can be used for block-based motion estimation where it can locate the best matching blocks between two frames using a search triangle that changes its direction and its size through a set of operations. These operations provide the triangle with the large flexibility to locate the best matching block in less number of search iterations. Simulation results indicates that the proposed technique reduces number of cycles required for motion estimation by around 8% and thus enable the video encoder to support higher frequencies or larger resolutions. The proposed design was implemented, simulated, and tested using VHDL and synthesized using Xilinx ISE for the Xilinx Spartan3 device. The results obtained were compared to an FPGA implementation of the FTS algorithm published in previous work.